Sampled-Data Systems

Sampled-Data Systems#

Machine drives and grid converter systems are sampled-data systems, consisting of a continuous-time system and a discrete-time control system as well as the interfaces between them [1], [2]. The figure below shows a generic example system. The same architecture is used in motulator: the continuous-time system model is simulated in the continuous-time domain while the discrete-time control system runs in the discrete-time domain. The default solver is the explicit Runge-Kutta method of order 5(4) from scipy.integrate.solve_ivp.

Block diagram of a sampled-data system

Block diagram of a sampled-data system. Discrete signals and systems are shown in blue, and continuous signals and systems are shown in red.#

Block diagram of a sampled-data system

Block diagram of a sampled-data system. Discrete signals and systems are shown in blue, and continuous signals and systems are shown in red.#

As mentioned, the physical components of a machine drive or a grid converter system are modeled as continuous-time systems. Such a system model comprises a power converter model along with other subsystem models, such as an electric machine model or grid model. In addition to the inputs \(\boldsymbol{q}(t)\) from the control system, the continuous-time system may have external continuous-time inputs \(\boldsymbol{e}(t)\), such as a load torque or power fed to the DC bus. After the simulation, all continuous-time states \(\boldsymbol{x}(t)\) are available for post-processing and plotting. In Drive Examples and Grid Examples, the instances of continuous-time system model classes are named mdl.

A discrete-time control system (named ctrl in the examples) contains control algorithms, such as a speed controller and current controller. The reference signals \(\boldsymbol{r}(k)\) could contain, e.g., a speed reference of an electric machine or a power reference of a grid converter. The feedback signals \(\boldsymbol{y}(k)\) typically contain at least the measured DC-bus voltage and converter phase currents.

Digital control systems typically have a computational delay of one sampling period, \(N=1\). The PWM block shown in the figure models the carrier comparison. If the switching ripple is not of interest in simulations, the carrier comparison can be replaced with a zero-order hold (ZOH).

References